Same story. The ref clock in the R2 is 20 MHz, which means 20 MSPS is native and doesn’t require any extra PLL. To get any rate that is not an integer division of 20 MHz, (for eg. 24MSPS,) a PLL + dividers are required. Furthermore, an extra effort is required for packing all the data at 24MSPS to fit within the transfer budget of USB 2.0. The MCU is clocked to allow these configs to run smoothly if the host computer is fast enough, but again… more data => more current => higher temperature.
